New paradigms for instruction level parallelism should focus on implementations based on multiple program counters. One such paradigm is "low overhead autotasking" where a small number of processors (perhaps on a single chip) cooperate in executing a single process. The compiler detects parallelism (and manages data communication) automatically. A second, more radical, approach is the multiscalar paradigm where the hardware takes much more responsibility for resolving data dependences. Tasks are assigned to processing units speculatively, and hardware plays a major role in communicating register and memory data. Memory loads and stores from different tasks may be performed speculatively, and in parallel, with hardware recovery in the event of incorrect speculation. Low overhead autotasking and the multiscalar processing are endpoints of a broad spectrum of possible approaches that should be studied for use in future high performance processors.