Wednesday, November 12
0800 - 0830 - Continental Breakfast
0830 - 1000 - Keynote Speech I
Joe Hoane, IBM T.J. Watson Research Center
1000 - 1030 - Break
1030 - 1200 - Session I. Analysis and Code Optimizations
Chair - Keshav Pingali, Cornell University
Locality Analysis for Parallel C Programs
Yingchun Zhu and Laurie J. Hendren
McGill University
Heap Analysis and Optimizations for Threaded Programs
Xinan Tang, Rakesh Ghiya, Laurie J. Hendren, and Guang R. Gao
McGill University and University of Delaware
Interprocedural Distribution Assignment Placement:
More than just enhancing intraprocedural placing techniques
Jens Knoop and Eduard Mehofer
Universitat Passau and Universitat Wien
1200 - 1330 - Lunch
1330 - 1500 - Session II. Networks/Communication Optimization
Chair - Skevos Evripidou, University of Cyprus
The Effect of Limited Network Bandwidth and its Utilization by
Latency Hiding Techniques in Large-scale Shared Memory Systems
Sunil Kim and Alexander V. Veidenbaum
IBM and University of Illinois at Chicago
Efficient Personalized Communication on Wormhole Networks
Fabrizio Petrini and Marco Vanneschi
Universita di Pisa
Empirical Evaluation of Deterministic and Adaptive Routing with
Constant-Area Routers
Dianne Miller and Walid Najjar
Colorado State University
1500 - 1530 - Break
1530 - 1700 - Session III. ILP Optimization/Code Scheduling
Chair - Mateo Valero, Universitat Politecnica de Catalunya
A register pressure sensitive instruction scheduler for
dynamic issue processors
Raul E. Silvera, Jian Wang, R. Govindarajan, and Guang R. Gao
McGill University
A Parallel Algorithm for Compile-Time Scheduling of Parallel
Programs on Multiprocessors
Yu-Kwong Kwok and Ishfaq Ahmad
The Hong Kong University of Science and Technology
Path Profile Guided Partial Dead Code Elimation Using Predication
Rajiv Gupta, David A. Berson, and Jesse Z. Fang
University of Pittsburgh and Intel Corporation
1730 - 1830 - Session IV. Short Papers Presentations
Chair - Greg Egan, Monash University
The PROMIS Compiler Prototype
Carrie Brownhill, Alexandru Nicolau, Steven Novack, and
Constantine Polychronopoulos
University of California, Irvine and University of Illinois at
Urbana-Champaign
Improving the Memory Bandwidth of Highly-Integrated, Wide-Issue,
Microprocessor-Based Systems
David H. Albonesi and Israel Koren
University of Rochester and University of Massachusetts
Parallel Execution of Radix Sort Program using Fine-grain
Communication
Yuetsu Kodama, Hirofumi Sakane, Koike Hanpei, Mitsuhisa Sato,
Shuichi Sakai, and Yoshinori Yamaguchi
Electrotechnical Laboratory
Interprocedural Array Remapping
Michal Cierniak and Wei Li
University of Rochester
Design of Heterogenous Multi-processor Embedded Systems:
Applying Functional Pipelining
Ireneusz Karkowski and Henk Corporaal
Delft University of Technology
VLIW Across Multiple Superscalar Processors On A Single Chip:
A Smart Compiler and a Smart Machine
Soohong P. Kim, Raymond R. Hoare, and Henry G. Dietz
Purdue University
1830 - 2100 - Reception and Poster Presentations
Thursday, November 13
0800 - 0830 - Continental Breakfast
0830 - 1000 - Keynote Speech II
Burton Smith, Tera Computer Company
Concurrent Design of a Compiler
and an Architecture
1000 - 1030 - Break
1030 - 1200 - Session IV. Profiling and Prediction Based Optimizations
Chair - Walid Najjar, Colorado State University
Path Prediction for High Issue-Rate Processors
Kishore N. Menezes, Sumedh W. Sathaye and Thomas M. Conte
North Carolina State University
Buffer-Safe Communication Optimization based on Data Flow
Analysis and Performance Prediction
Thomas Fahringer and Eduard Mehofer
University of Vienna
MDL: A Language and Compiler for Dynamic Program Instrumentation
Jeffrey Hollingsworth, Barton Miller, Marcelo Gonccalves,
Oscar Naim, Zhichen Xu, and Ling Zheng
University of Maryland and University of Wisconsin
1200 - 1330 - Lunch
1330 - 1500 - Session V. Compilation Issues for Multiprocessors
Chair - Behrooz Shirazi, University of Texas at Arlington
Optimally Synchronizing Loops on Shared Memory Multiprocessors
Ramakrishnan Rajamony and Alan Cox
Rice University
Two Techniques for Static Array Partitioning on Message-Passing
Parallel Machines
Eric Hung-Yu Tseng and Jean-Luc Gaudiot
University of Southern California
Compiler Algorithms for Optimizing Locality and Parallelism on
Shared and Distributed Memory Machines
M. Kandemir, J. Ramanujam, and A. Choudhary
Syracuse University, Louisiana State University, and
Northwestern University
1500 - 1530 - Break
1530 - 1700 - Session VI. Compiler/Architecture Interaction in
Parallelism Exploitation
Chair - David Albonesi, University of Rochester
Effective Usage of Vector Registers in Advanced Vector Architectures
Luis Villa, Roger Espasa, and Mateo Valero
Universitat Politecnica de Catalunya-Barcelona
Static Locality Analysis for Cache Management
F. Jesus Sanchez, Antonio Gonzalez, and Mateo Valero
Universitat Politecnica de Catalunya
Overcoming Limitations of Prefetching in Multiprocessors by
Compiler-Initiated Coherence Actions
Jonas Skeppstedt
Chalmers University of Technology